XCENA provides a CXL 3.2 computational memory platform (MX1) that combines up to 2 TB of DDR5 memory with thousands of custom RISC‑V cores and vector engines for near‑data processing, exposing the memory pool via standard CXL and PCIe 6.0 interfaces. Its full‑stack SDK offers multi‑level APIs, simulation tools, and drivers that let hyperscale cloud providers, telecom operators, and research institutions integrate expanded, low‑latency memory and compute acceleration into existing AI, vector‑search, and analytics workloads with minimal code changes.
Funding
$185M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
Founders
Product
Problem
AI workloads in data centers are constrained by limited memory capacity and high latency when moving data between CPU, GPU, and storage, leading to inefficient compute and increased infrastructure costs. Traditional architectures also lack integrated near-data processing, making it difficult to accelerate memory-intensive tasks such as large language model inference, vector database queries, and big‑data analytics.
Solution
XCENA offers a CXL 3.2 computational memory platform (MX1) that combines up to 2 TB of DDR5 memory with thousands of custom 1.4 GHz RISC‑V cores and vector engines for near‑data processing. By exposing the memory pool via standard CXL and PCIe 6.0 interfaces, applications can access expanded memory with zero‑copy load/store semantics, offloading compute to the memory module and reducing data movement. The platform includes hardware‑assisted compression, enhanced RAS (Chipkill, multi‑bit error detection), and in‑line AES‑XTS 256 encryption for reliability and security. XCENA’s full‑stack SDK provides multi‑level APIs, simulation tools, and drivers for major operating systems, enabling developers to integrate computational memory into existing workflows with minimal code changes.
Target Audience
Primary customers are hyperscale cloud providers, telecom operators, and research institutions that run large AI models, vector‑search workloads, or high‑throughput data analytics and need scalable, low‑latency memory with built‑in compute acceleration.
Features
- Up to 2 TB of DDR5 RDIMM memory (256 GB DIMM, 2 DPC) accessed via CXL 3.2 Type 3 HDM‑DB with PCIe 6.0 dual ×8 host interface
- Thousands of custom 1.4 GHz RISC‑V cores and FP32/FP16 vector engines for near‑data processing
- LLVM‑based toolchain and high‑level runtime APIs for seamless CXL integration
- Hardware‑assisted LZ4 decompression and software‑based compression on RISC‑V cores
- Enhanced reliability features: Chipkill, multi‑bit error detection, DRAM ECC, SSD RAID, end‑to‑end data protection
- In‑line AES‑XTS 256 encryption for data security
- InfiniteMemory™ architecture with integrated PCIe 6.0 root complex and SSD RAID support for petabyte‑scale memory expansion