Unaware provides a PCIe plug‑and‑play AI accelerator ASIC that runs neural network inference directly on hardware without a host operating system or runtime libraries. The chip’s dataflow architecture, on‑chip weight storage, and secure enclaves deliver over 10 TOPS/W efficiency while protecting model and data privacy, targeting privacy‑focused AI developers, edge‑computing startups, and small research labs.
Funding
Funding not disclosed
Founders
Product
Problem
Running large neural networks locally requires expensive, power‑hungry hardware and a complex software stack, limiting access for individuals and small organizations. High upfront costs and reliance on proprietary drivers also expose users to privacy risks when processing sensitive data on cloud‑based services.
Solution
Unaware delivers a purpose‑built AI accelerator ASIC that executes neural network workloads end‑to‑end without a host operating system or runtime libraries. The chip embeds a dataflow inference engine and on‑chip weight storage, allowing models to run directly from compiled binary blobs, which eliminates software‑level dependencies and reduces attack surface. By leveraging a custom instruction set optimized for tensor operations, the accelerator achieves higher throughput per watt than conventional GPUs, enabling affordable, low‑latency inference on a desktop‑class power envelope. The hardware is sold as a plug‑and‑play PCIe card with a minimal firmware layer, so users can install the device and load pre‑compiled model packages to start inference instantly. Integrated secure enclaves protect model parameters and input data, ensuring that proprietary or personal information never leaves the local machine.
Target Audience
The primary customers are privacy‑focused AI practitioners, edge‑computing startups, and small research labs that need high‑performance inference without cloud dependence or large capital expenditure. It also serves hobbyist developers and educators seeking affordable, turnkey AI hardware for experimentation and teaching.
Features
- ASIC‑level dataflow architecture with native support for mixed‑precision (FP16/INT8) tensor cores
- Runtime‑free execution model: compiled model binaries run directly on hardware, removing OS drivers and libraries
- On‑chip weight cache and high‑bandwidth memory interface delivering >10 TOPS/W power efficiency
- PCIe Gen4 form factor with hot‑swap capability and zero‑configuration firmware bootloader
- Built‑in hardware security enclave for encrypted model storage and secure inference isolation
- Compatibility layer for popular frameworks (TensorFlow, PyTorch) via an offline model compiler toolchain
- Scalable multi‑card clustering support through a low‑latency interconnect for distributed inference workloads