Thess IC provides full‑stack fabless ASIC design services that turn IoT concepts into production‑ready silicon, using its proprietary low‑power RISC‑V cores, analog and mixed‑signal IP, and support for 0.25 µm to 22 nm process nodes. The end‑to‑end flow covers system architecture, RTL development, physical implementation, verification, and post‑silicon validation, plus an integrated IDE, compiler, debugger, and RTOS, enabling OEMs and hardware startups to accelerate market entry.
Funding
Funding not disclosed
Founders
Product
Problem
Hardware companies often lack in‑house ASIC expertise, making it difficult to develop low‑power, cost‑effective IoT silicon that meets tight area and battery‑life constraints. The absence of a turnkey design flow forces them to engage multiple vendors, extending time‑to‑market and increasing risk.
Solution
Thess IC offers a full‑stack fabless ASIC design service that turns customer concepts into silicon‑ready products. Leveraging an extensive in‑house IP portfolio—including Cortus SAS RISC‑V cores—and deep analog, mixed‑signal, and digital expertise, the company delivers custom SoC solutions optimized for power, area, and performance. Their end‑to‑end flow covers system architecture, RTL development, physical implementation, verification, and post‑silicon validation across 0.25 µm to 22 nm process nodes. An integrated ecosystem of IDE, compiler, debugger, and RTOS further accelerates development and reduces integration effort. Clients receive production‑ready design files, test boards, and support for volume ramp‑up, enabling rapid market entry without the overhead of managing multiple design partners.
Features
- Proprietary low‑power IoT controller IP with extended battery life and reduced silicon footprint
- Access to Cortus SAS RISC‑V processor IP, offering configurable cores for diverse performance targets
- Analog and mixed‑signal block design (e.g., LDOs, SAR/Delta‑Sigma ADCs, sensor interfaces) optimized for IoT power budgets
- Complete design flow: specification, RTL coding, synthesis, place‑and‑route, timing closure, and sign‑off
- Verification suite including simulation, formal checks, and hardware‑in‑the‑loop testing on custom test boards
- Production support: engineering samples, yield analysis, and ramp‑up services for high‑volume manufacturing
- Multi‑node capability (0.25 µm to 22 nm) with foundry partnerships (TSMC, UMC, GlobalFoundries)
- Software ecosystem integration (IDE, compiler, debugger, RTOS) for seamless firmware development