Szimpla provides a maskless lithography workstation that integrates exposure, development, and etch into a single automated step, delivering sub‑micron patterning for analog, mixed‑signal, and MEMS chips. The system accepts standard layout files, offers real‑time monitoring and built‑in metrology, and enables on‑site low‑volume prototyping in days instead of weeks, eliminating photomask costs and NRE overhead.
Funding
Funding not disclosed
Founders
Product
Problem
Traditional semiconductor prototyping relies on multi‑step photomask fabrication, incurring high mask fees and substantial non‑recurring engineering (NRE) costs while extending turnaround times to months. These expenses and delays restrict low‑volume production and impede rapid design iteration for analog, mixed‑signal, and MEMS developers.
Solution
Szimpla offers a maskless, direct‑design‑to‑fab equipment platform that consolidates exposure, development, and pattern transfer into a single, automated step. By eliminating photomasks, the system cuts per‑run costs and removes the NRE overhead associated with conventional IC manufacturing. The hardware delivers sub‑micron patterning accuracy suitable for analog, mixed‑signal, and MEMS structures, enabling functional chips to be fabricated in days rather than weeks. An integrated software suite accepts standard layout files, orchestrates process parameters, and provides real‑time monitoring to ensure repeatable results. The turnkey solution is delivered as a modular workstation that can be installed on‑site, giving designers immediate access to rapid, low‑volume production without relying on external foundries.
Target Audience
Primary customers are fabless analog and mixed‑signal design firms, MEMS foundries, and university or corporate research labs that require fast, low‑volume chip prototyping without the cost and lead time of traditional mask‑based fabrication.
Features
- Maskless lithography engine with sub‑micron resolution and on‑the‑fly pattern generation
- Unified process flow that combines exposure, development, and etch in a single automated cycle
- Compatibility with standard CMOS, analog, mixed‑signal, and MEMS process stacks
- Integrated design import toolchain supporting GDSII, OASIS, and proprietary layout formats
- Real‑time process monitoring and closed‑loop feedback for pattern fidelity and yield optimization
- Modular workstation design allowing easy scaling of throughput and tool configuration
- Built‑in metrology and defect inspection module for in‑process quality assurance
- Secure cloud‑connected data logging for batch tracking, recipe management, and remote diagnostics