Synthara provides ComputeRAM™, a drop‑in, CMOS‑compatible SRAM that integrates in‑memory computing to eliminate the memory‑compute bottleneck in edge devices. By performing most arithmetic directly within the memory array, it delivers up to 100× faster AI inference and significant energy savings, enabling high‑performance TinyML without dedicated accelerators.
Funding
$5.5M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
7OFounders
Product
Problem
Embedded devices running AI workloads face a memory‑compute bottleneck: data must be shuttled between separate memory and processing units, leading to high latency and excessive energy consumption, especially in low‑power edge applications.
Solution
Synthara’s ComputeRAM™ replaces conventional SRAM with a drop‑in, fully CMOS‑compatible memory that incorporates in‑memory computing (IMC) capabilities. By performing the majority of arithmetic operations directly within the memory array, ComputeRAM eliminates the costly memory‑bus transfers, delivering up to 100× improvements in speed and energy efficiency for AI inference on microcontrollers. The solution integrates seamlessly with existing chip designs and instruction set architectures (ARM, RISC‑V, x86) without requiring foundry waivers. A developer‑focused SDK provides optimized linear‑algebra, signal‑processing, and neural‑network primitives that can be extended for custom functions, enabling rapid deployment of high‑performance TinyML applications at the edge.
Target Audience
Primary customers are semiconductor manufacturers and embedded system designers building low‑power AI‑enabled products such as wearables, robotics, smart sensors, and other edge devices.
Features
- Drop‑in replacement for standard SRAM, compatible with any CMOS process and major ISAs (ARM, RISC‑V, x86)
- In‑memory computing engine that offloads up to 99% of matrix‑vector operations to memory, reducing bus activity
- Demonstrated 139× faster processing and 158× better energy efficiency on a Cortex‑M0 benchmark
- Achieves up to 30× speedup and 32× energy savings on MLPerf™ Tiny benchmarks versus leading TinyML submissions
- Fully CMOS implementation requiring no special foundry waivers, simplifying chip design and reducing cost
- SDK with ready‑to‑use linear algebra, signal processing, and neural network kernels, extensible for new functions
- Enables TinyML workloads without dedicated AI accelerators, lowering system complexity and time‑to‑market