Funding
Funding not disclosed
Founders
Product
Problem
Developing and deploying AI chips requires significant optimization to achieve desired performance and efficiency, often hindered by the complexities of hardware-software integration. Traditional methods can lead to increased power consumption and prolonged development cycles.
Solution
Siliscale offers hardware-software co-design solutions that optimize AI accelerators through advanced compiler technology and methodologies. Their approach integrates compiler design with custom hardware architectures to maximize performance, energy efficiency, and cost-effectiveness. By leveraging open-source technologies like MLIR, LLVM, and RISC-V, Siliscale streamlines the development process and enhances the performance of AI chips. The company specializes in custom compilers tailored to specific performance needs, along with model quantization and deployment services to ensure seamless integration into production environments.
Target Audience
The primary audience includes AI chip developers and system architects seeking to improve the performance and efficiency of their AI hardware.
Features
- Hardware-software co-design integrating compiler techniques with custom hardware architectures
- Custom compiler design and development for AI accelerators
- Model quantization and deployment services for efficient execution on various hardware platforms
- Optimization for performance, energy efficiency, and cost-effectiveness
- Utilizes open-source technologies such as MLIR, LLVM, and RISC-V
- Support for generating RISC-V vector code from TensorFlow via XLA
- Capabilities for compiling Large Language Models (LLMs) to RISC-V