PhantaField provides an integration platform utilizing 2D TMD technology to enable significantly faster and more cost-efficient GPU stacks compared to monolithic designs. Their toolkit integrates process recipes and design templates to optimize performance, power, and cost targets across various logic and memory technologies. This technology accelerates applications like LLM training, low-power inference, and provides radiation-tolerant solutions for space computing.
Funding
$1.1M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
Founders
Product
Problem
Traditional transistor manufacturing methods using silicon face limitations in miniaturization, flexibility, and interlayer communication bandwidth, hindering advancements in wearable and high-performance electronic devices. Wafer bonding and through-silicon vias (TSVs) used in 3D integration introduce complexities and bottlenecks in interlayer communication.
Solution
This startup develops atomically thin 2D semiconductor materials to fabricate ultra-small, flexible, and transparent transistors, enabling next-generation wearable electronics. Their monolithic 3D transistor architecture eliminates the need for wafer bonding and TSVs by directly stacking thin films of 2D materials, resulting in high-density interconnects and significantly improved interlayer communication bandwidth. This approach overcomes the limitations of conventional silicon-based transistors and wafer-bonded 3D structures, paving the way for more efficient and compact electronic devices.
Target Audience
The primary target audience includes manufacturers of wearable electronics, high-performance computing devices, and flexible displays seeking to enhance device performance and miniaturization.
Features
- Atomically thin 2D semiconductor materials for creating the smallest transistors
- Flexible and transparent transistors suitable for wearable applications
- Monolithic 3D transistor architecture enabling direct stacking of transistors
- High-density interconnect between layers for exceptional interlayer communication bandwidth
- Elimination of wafer bonding and through-silicon vias (TSVs)