Nord Quantique builds superconducting quantum processors that embed bosonic error‑correcting codes, achieving a one‑to‑one logical‑to‑physical qubit ratio and eliminating extensive redundancy. Its tileable, rack‑scale architecture integrates with standard data‑center power, cooling, and networking, providing fault‑tolerant quantum computing for cloud providers, research labs, and large‑scale HPC operators.
Funding
CA$32.5M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
BCISFounders
Product
Problem
Current quantum processors rely on large numbers of physical qubits to implement error‑correction codes, resulting in massive hardware overhead, high power consumption, and systems that occupy industrial‑scale facilities. This scaling barrier limits the deployment of fault‑tolerant quantum computers in conventional data‑center environments.
Solution
Nord Quantique delivers a superconducting quantum processor that embeds bosonic error‑correcting codes directly into each qubit, achieving a 1:1 logical‑to‑physical qubit ratio. By correcting bit‑flip and phase‑flip errors at the hardware level, the architecture eliminates the need for extensive redundancy, dramatically reducing system size and energy demand. The design is modular and tileable, allowing rack‑scale integration with standard data‑center cooling and power infrastructure. Fast clock rates and mature superconducting circuit technology provide the performance needed for practical, fault‑tolerant quantum computing.
Target Audience
Primary customers are cloud service providers, national research laboratories, and large‑scale HPC or data‑center operators seeking scalable, fault‑tolerant quantum processors for advanced computational workloads.
Features
- Superconducting circuit platform leveraging industry‑standard fabrication processes for high coherence times.
- Bosonic error‑correction schemes (grid, multimode, Tesseract codes) that encode logical information within a single physical resonator.
- True 1:1 logical‑to‑physical qubit mapping, minimizing qubit overhead and reducing hardware footprint.
- Tileable, rack‑scale modular architecture enabling seamless scaling from a few qubits to hundreds of logical qubits.
- High‑speed clock architecture delivering faster gate operations, which shortens the required coherence window.
- Integrated cryogenic control electronics that reduce wiring complexity and improve system reliability.
- Compatibility with existing data‑center power, cooling, and networking standards for straightforward deployment.