Neurophos develops a photonic computing architecture that utilizes ultra-dense optical modulators to achieve 160,000 TOPS at 300 TOPS per watt, significantly outperforming traditional GPUs. This technology addresses the escalating demand for AI compute power by providing a solution that replaces 100 GPUs with a single processor while consuming only 1% of the energy.
Funding
$16.8M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
GFFounders
Product
Problem
The escalating demands of AI, particularly for large language models, require significant increases in compute power, leading to high costs and unsustainable energy consumption for companies relying on traditional GPUs and TPUs. Scaling these systems faces limitations due to real estate constraints and diminishing returns in energy efficiency.
Solution
Neurophos is developing an optical processing unit (OPU) that leverages photonic computing to achieve substantial performance gains with significantly reduced power consumption. By miniaturizing optical modulators by a factor of 10,000, Neurophos enables a 3D photonic computing architecture that overcomes the limitations of traditional electronic systems. The OPU utilizes optical systolic arrays, where light replaces electrons, eliminating latency issues and enabling clock speeds of 100 GHz or higher. This approach allows a single Neurophos processor to deliver the performance of 100 GPUs while consuming only 1% of the power.
Target Audience
The primary target audience includes organizations involved in AI model training and inference, particularly those working with large language models and requiring high compute performance with stringent power constraints.
Features
- Ultra-dense optical modulators based on metasurface technology, 8,000 times smaller than standard silicon photonics modulators
- Optical systolic arrays that use light for computation, eliminating signal propagation latency
- Goodman Engine architecture for purely optical vector-matrix multiplications
- Folded design for compact and efficient layout, reducing latency and enhancing scalability
- 3D stacking on a standard CMOS chip with dense through-silicon via (TSV) array for high-bandwidth communication
- Model-agnostic design that supports multiple numerical formats without retraining