Mythic provides analog compute‑in‑memory AI inference accelerators that integrate compute and weight storage on a single silicon plane, eliminating off‑chip memory traffic. Delivered as standard M.2 cards, the APUs achieve up to 25 TOPS with 3‑4× lower power than comparable digital accelerators, and are compatible with TensorFlow and PyTorch for edge devices such as robots, drones, and smart‑city cameras.
Funding
$13M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
AMFounders
Product
Problem
Digital AI inference architectures separate compute and memory, causing high latency, excessive power consumption, and prohibitive cost for edge deployments such as robots, drones, and smart‑city cameras. The memory‑bandwidth bottleneck limits the scalability of neural‑network workloads on constrained devices.
Solution
Mythic delivers Analog Processing Units (APUs) that fuse compute and memory into a single silicon plane, eliminating the off‑chip data movement that dominates power and latency in conventional digital accelerators. The analog compute‑in‑memory design enables AI inference with up to 25 TOPS per chip while consuming a fraction of the energy of comparable digital solutions. Mythic offers the technology in standard M.2 form‑factor cards (MM1076, ME1076, M1076) that can be dropped into edge servers, cameras, or embedded platforms without redesigning the host system. By removing the memory bottleneck, the APUs provide order‑of‑magnitude improvements in performance‑per‑watt, cost efficiency, and scalability across edge to enterprise workloads. The solution integrates with existing AI toolchains, allowing developers to compile standard neural‑network models for analog execution with minimal code changes.
Target Audience
Primary customers are OEMs and system integrators developing edge AI for robotics, autonomous drones, smart‑city surveillance cameras, AR/VR devices, and industrial automation, as well as defense contractors requiring low‑power, high‑performance inference.
Features
- Analog compute‑in‑memory architecture that stores neural‑network weights directly in the processor, eradicating off‑chip memory traffic
- Up to 25 TOPS of inference throughput per chip with 3.8× lower power draw compared to leading digital AI accelerators
- M.2 M‑Key and A+E‑Key card formats (MM1076, ME1076) for seamless integration into edge servers, cameras, and embedded boards
- Dataflow execution engine that streams activations through analog matrix arrays, delivering low‑latency inference for vision and sensor fusion tasks
- 10× lower total cost of ownership through reduced silicon count, simplified board design, and minimal cooling requirements
- Compatibility with standard AI frameworks (TensorFlow, PyTorch) via Mythic’s compiler toolchain, enabling direct deployment of existing models
- Small footprint and high thermal efficiency suitable for space‑constrained platforms such as drones, AR/VR headsets, and industrial robots