Werner Kim
Founder & CEO
MetaEncore
MetaEncore provides a unified platform that merges Universal Verification Methodology (UVM) with Rust for hardware modeling, enabling SoC designers to write safety‑focused code and automatically generate rigorous testbenches. Integrated CI/CD pipelines automate compilation, simulation, and regression testing, delivering continuous verification feedback and reducing manual hand‑offs to accelerate chip development.
- Developer Tools
- Semiconductor
- Software Only
Updated 6 months ago
Funding
Funding rounds are not available yet.
Founders
Edwin Sun
Co-founder & CTO
고종환
Co-founder
Sangdeok Park
Co-founder
Product
Problem
Designing complex System‑on‑Chip (SoC) architectures requires extensive verification and integration of multiple development tools, leading to long development cycles, error‑prone code, and difficulty maintaining consistency across verification, implementation, and deployment workflows.
Solution
MetaEncore offers a unified development platform that combines Universal Verification Methodology (UVM) with the Rust programming language and built‑in DevOps pipelines. The platform enables designers to write safety‑focused, high‑performance Rust code for hardware models while automatically applying rigorous UVM testbenches. Integrated CI/CD workflows orchestrate compilation, simulation, and regression testing, providing continuous feedback and reducing manual hand‑offs. By consolidating verification, implementation, and deployment into a single environment, MetaEncore shortens time‑to‑market and improves the reliability of semiconductor products.
Target Audience
Primary customers are SoC design engineers and verification teams at semiconductor companies and fabless chip designers seeking a cohesive, safety‑oriented development environment.
Features
- Integrated UVM testbench framework that supports standard verification components and stimulus generation
- Rust language support with safety guarantees (memory safety, concurrency) for hardware description and modeling
- Built‑in DevOps pipeline automating build, simulation, and regression testing across multiple design stages
- Seamless version control integration and artifact management for traceable design iterations
- Extensible plugin architecture allowing custom verification IP and toolchain adapters
- Real‑time reporting dashboard displaying test coverage, pass/fail metrics, and performance benchmarks