LightXcelerate builds optical chiplet interconnects that replace electrical I/O at the package edge, delivering terabit‑class bandwidth with sub‑2 pJ/bit energy use and up to 50 m reach. By converting electrical signals to light, their silicon‑photonic modules enable unified optical fabrics that link GPUs, memory, and switches with low latency and high density, addressing the bandwidth and power limits of copper interconnects for AI and high‑performance computing systems.
Funding
Funding not disclosed
Founders
Product
Problem
Current AI and high‑performance computing systems are constrained by electrical interconnects that cannot provide sufficient bandwidth, low power consumption, or long reach, leading to performance bottlenecks in data movement between GPUs, memory, and switches.
Solution
LightXcelerate develops optical chiplet interconnects that replace traditional electrical I/O at the package edge. Their technology delivers terabit‑class bandwidth with energy efficiency below 2 pJ per bit and supports transmission distances up to 50 meters. By integrating these optical chiplets, AI accelerators, memory modules, and network switches can be linked into a unified optical fabric, eliminating the copper ceiling, reducing switching power, and enabling disaggregated system designs without sacrificing latency. The approach leverages silicon photonics to provide high‑density, low‑loss connections that scale with future AI workloads.
Target Audience
Primary customers are AI hardware manufacturers, data‑center infrastructure providers, and system integrators building large‑scale GPU clusters, disaggregated memory systems, and high‑performance switch fabrics.
Features
- Optical chiplet modules that plug into standard package edges, converting electrical signals to light for data transmission
- Terabit‑per‑second bandwidth capability per link, far exceeding copper interconnect limits
- Sub‑2 pJ/bit energy consumption, reducing overall data‑center power draw
- Up to 50 meter reach, allowing physical separation of GPUs, memory, and switches while maintaining low latency
- Compatibility with existing GPU, memory, and switch architectures through standardized I/O interfaces
- Integrated silicon‑photonic design that supports high‑density routing and scalable optical switching fabrics