The company offers independent wafer‑probe and final‑die testing services for fabless designers and contract manufacturers, covering 12‑inch and 8‑inch wafers across process nodes from 3 nm to 16 nm and a wide range of package types. Using platforms such as Advantest V93K, Teradyne J750EX and Accotest STS8200, it provides electrical characterization, functional verification, burn‑in, and statistical yield analysis with detailed reports and failure analysis. The service eliminates the need for customers to invest in costly test equipment, accelerates time‑to‑market and ensures compliance with automotive and semiconductor quality standards.
Funding
Funding not disclosed
Founders
Product
Problem
Semiconductor manufacturers must validate wafer‑level and final‑die performance across a wide range of IC types and advanced process nodes, but testing requires costly, specialized equipment, deep expertise, and high‑throughput capacity to meet volume demands and stringent quality standards.
Solution
The company provides a full suite of independent testing services that cover 12‑inch and 8‑inch wafer probe, final‑die test, and custom test‑scheme development for thousands of chip families, including MCUs, MEMS, AI, security, storage, touch, and automotive‑grade devices. Its laboratories are equipped with industry‑leading platforms such as Advantest V93K/T2K/T53, Teradyne J750EX/M2, and Accotest STS8200, enabling precise electrical characterization, functional verification, and burn‑in under controlled temperature and voltage conditions. Clients receive detailed test reports, failure analysis, and statistical yield data that integrate with their design‑for‑test (DFT) and quality‑control workflows. The service supports process nodes from 3 nm to 16 nm and a broad spectrum of package types (e.g., QFN, BGA, CSP, μBGA), ensuring scalability from prototype to high‑volume production. By handling test development, execution, and data management, the company reduces time‑to‑market and lowers capital outlay for its customers while maintaining compliance with automotive (IATF 16949) and semiconductor industry standards.
Target Audience
Primary customers are fabless semiconductor designers, integrated device manufacturers, and contract manufacturers that require reliable wafer‑level and final‑die testing for consumer, industrial, automotive, and IoT chip portfolios.
Features
- Comprehensive wafer‑probe and final‑die test lines capable of processing ~120 k wafers and up to 300 M packaged chips per month.
- Over 44 standardized test‑scheme families covering more than 6 000 chip models, with custom development for new designs.
- Advanced test equipment portfolio (Advantest V93K/T2K/T53, Teradyne J750EX/M2, Accotest STS8200, NI STS, etc.) for high‑precision electrical and functional measurements.
- Support for multiple package formats (SIP, QFP, LQFP, QFN, PLCC, BGA, DIP, SOP, SSOP, TSOP, TSSOP, μBGA, CSP) and process nodes down to 3 nm.
- Integrated burn‑in, high‑/low‑temperature stress testing, and statistical yield analysis with secure, encrypted data transfer.
- Compliance with industry quality standards (IATF 16949, ISO 9001) and traceability for automotive‑grade and safety‑critical applications.
- Dedicated engineering team for test plan co‑development, DFT alignment, and rapid turnaround of prototype to volume production.