Data center and cloud workloads increasingly demand specialized processing for networking, security, and storage tasks, but traditional CPUs and generic accelerators cannot meet the performance, latency, and isolation requirements efficiently. Yunbao Intelligent designs and manufactures DPU (Data Processing Unit) System on Chip solutions that offload and accelerate these workloads from the host CPU. Their SoCs integrate programmable packet processing, encryption, and storage acceleration engines with a software defined architecture, allowing customers to customize functionality through firmware and drivers.
Funding
Funding not disclosed
Founders
Product
Problem
Data center and cloud workloads increasingly demand specialized processing for networking, security, and storage tasks, but traditional CPUs and generic accelerators cannot meet the performance, latency, and isolation requirements efficiently.
Solution
Yunbao Intelligent designs and manufactures DPU (Data Processing Unit) System-on-Chip solutions that offload and accelerate these workloads from the host CPU. Their SoCs integrate programmable packet processing, encryption, and storage acceleration engines with a software-defined architecture, allowing customers to customize functionality through firmware and drivers. The company provides a full hardware‑software stack, including SDKs, drivers, and management tools, to enable rapid integration into existing cloud and data‑center infrastructures. By delivering high‑throughput, low‑latency processing with built‑in security features, Yunbao’s DPUs help operators improve resource utilization, reduce power consumption, and meet emerging service‑level objectives.
Target Audience
Primary customers are cloud service providers, hyperscale data‑center operators, and enterprise IT teams that require dedicated acceleration for networking, security, and storage functions.
Features
- Customizable DPU SoC architecture with programmable packet‑processing pipelines and hardware‑accelerated cryptography
- Integrated high‑speed networking interfaces (e.g., 25 GbE/100 GbE) and DMA engines for storage offload
- Software‑defined chip framework supporting firmware updates and third‑party SDK integration
- Comprehensive development kit including drivers, APIs, and performance monitoring tools
- Low‑power design optimized for dense data‑center deployments