HyperAccel engineers specialized AI semiconductors, utilizing a novel LPU architecture designed for high-performance and energy-efficient Generative AI workloads. Their product line spans from edge devices to cloud datacenters, offering optimized solutions for LLM inference. The company supports leading AI frameworks through a dedicated software platform, ensuring seamless integration for developers.
Funding
$38.4M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
Founders
Product
Problem
Large language models (LLMs) require significant computational resources, leading to high costs and energy consumption for businesses deploying generative AI applications. Existing hardware solutions often struggle to efficiently process these models, resulting in latency and scalability bottlenecks.
Solution
HyperAccel provides silicon IP, server products, and software solutions that accelerate transformer-based LLMs, such as OpenAI GPT and Meta LLaMA. Their LLM Processing Unit (LPU) is a hardware accelerator designed for end-to-end LLM inference, balancing memory bandwidth and compute logic to maximize efficiency. The company's Expandable Synchronization Link (ESL) technology enables low-latency synchronization between multiple LPUs, facilitating the efficient scaling of hyperscale models. HyperAccel's solutions aim to deliver higher throughput performance with improved cost and energy efficiency compared to existing market solutions.
Target Audience
HyperAccel targets businesses deploying generative AI applications, including those using large language models, multimodal models, and Mixture of Experts (MoE) models.
Features
- LLM Processing Unit (LPU) IP optimized for low-power or high-performance LLM inference, reconfiguring memory and compute resources based on customer needs.
- Expandable Synchronization Link (ESL) for low-latency, peer-to-peer communication between LPUs, enabling efficient scaling for models with tens to hundreds of billions of parameters.
- HyperDex Framework: Compiler technology bridging datacenter applications, hyperscale models, and LPU-based hardware via high-level APIs and internal optimization tools.
- Support for various data types, including FP16, BF16, FP8, FP4, INT8, and INT4.
- Hardware-native continuous batching.
- vLLM compatibility with paged attention.