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FM

Ferroelectric Memory

Ferroelectric Memory (FMC) provides hybrid memory solutions that combine DRAM‑class speed with flash‑class persistence using ferroelectric technology. Their DRAM+ modules retain data without power, eliminating separate backup storage, while CACHE+ chiplets deliver high‑density, persistent cache to boost AI inference performance and reduce energy consumption. The products are compatible with standard DRAM manufacturing processes, enabling high‑volume production for data center servers, AI hardware manufacturers, and edge AI systems.

Dresden, GermanyFounded 2016585K+ followers
Updated 2 months ago

Funding

$141.7M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.

+11

Founders

Product

Problem

AI training and inference systems require memory that combines high speed with data persistence, but conventional DRAM loses data when power is removed and flash storage, while persistent, cannot match DRAM bandwidth. This mismatch forces designers to use separate volatile and non‑volatile memories, increasing system complexity, latency, and energy consumption.

Solution

Ferroelectric Memory (FMC) offers a hybrid memory architecture that merges DRAM‑class speed with flash‑class persistence using ferroelectric technology. Their DRAM+ modules retain data without power, eliminating the need for separate backup storage and reducing system boot times. CACHE+ chiplets provide high‑density, persistent cache for AI inference, boosting performance while lowering power draw. The solutions are designed for high‑volume manufacturing and can be integrated into existing semiconductor fab processes, enabling scalable deployment in AI data centers and edge devices.

Target Audience

Primary customers are AI hardware manufacturers, data center server designers, and semiconductor companies developing accelerators that require fast, persistent memory solutions.

Features

  • DRAM+ memory modules that deliver native DRAM bandwidth with non‑volatile data retention
  • CACHE+ persistent chiplets that increase inference throughput with high density and low latency
  • Ferroelectric material‑based storage cells providing fast write/read cycles and near‑zero standby power
  • Compatibility with standard DRAM manufacturing lines for seamless high‑volume production
  • Energy‑efficient operation that reduces overall system power consumption for AI workloads
  • Scalable architecture suitable for both large‑scale data center servers and low‑power edge AI systems
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