Fabric Cryptography

This company develops custom silicon, the Verifiable Processing Unit (VPU), designed exclusively for accelerating cryptographic workloads. The VPU combines ASIC performance with GPU flexibility to boost primitives for next-generation cryptography algorithms. They provide a compiler and libraries to enable cryptographers to build high-performance, privacy-focused systems.

San Francisco, United States522K+ followers

Updated 2 months ago

Funding

$52M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.

Funding rounds are not available yet.

Founders

Founder details are not available yet.

Product

Problem

Current CPUs and GPUs face performance limitations when processing complex cryptographic operations, hindering the efficiency of blockchain applications and other security-sensitive systems. Traditional hardware struggles to keep pace with the increasing demands of modern cryptographic algorithms.

Solution

Fabric has developed the Verifiable Processing Unit (VPU), a custom cryptography hardware platform designed to accelerate cryptographic algorithms. The VPU employs a unique instruction set and a RISC-V multi-core processor optimized exclusively for cryptographic purposes. This system-on-a-chip architecture eliminates the PCIe bottleneck and enables native witness generation. Fabric's solution achieves significant performance gains compared to CPU, GPU, and FPGA implementations by leveraging a non-blocking network-on-chip and a high-speed unified memory architecture.

Target Audience

The primary target audience includes cryptographers, cryptography engineers, and developers building blockchain applications and other systems requiring high-performance cryptographic processing.

Features

Custom silicon designed to accelerate core cryptographic primitives, balancing ASIC performance with GPU flexibility.
On-chip RISC-V multi-core processor for native witness generation.
Non-blocking network-on-chip and high-speed unified memory architecture for breakthrough performance.
LLVM-based compiler and reconfigurable library of primitives for software-defined cryptography.
Instruction set optimized for finite-field arithmetic and complex hash functions.
Support for major algorithms including plonky2, plonky3, GKR, halo2, Jolt/Lasso, and Nova.
Cloud offering for democratized access to advanced cryptographic operations.