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EMBRYA

EMBRYA develops low-footprint chip IPs that enable on-the-fly reconfiguration of artificial neural networks for embedded devices across various industries, including aerospace and automotive. This technology enhances model efficiency and adaptability, allowing devices to perform complex machine learning tasks without the constraints of traditional hardware limitations.

Toulouse, FranceFounded 20232100+ followers
Updated 3 months ago

Funding

Funding not disclosed

Funding rounds are not available yet.

Founders

Product

Problem

Embedded devices often face limitations in performing complex machine learning tasks due to hardware constraints and the need for efficient artificial neural network (ANN) processing. Traditional hardware architectures lack the flexibility to adapt to evolving model requirements, hindering performance and increasing power consumption.

Solution

EMBRYA provides low-footprint chip intellectual property (IP) cores that enable on-the-fly reconfiguration of artificial neural networks (ANNs) for embedded devices. Their technology allows for dynamic resizing and adaptation of ANN architectures without requiring code modifications, enhancing model efficiency and adaptability. The ENKI FPGA Core-IP and ENKI Development System facilitate seamless integration of this technology, enabling devices to perform complex machine learning tasks with improved performance and reduced resource consumption. EMBRYA's solution supports integration across various hardware platforms, including FPGAs, CPUs, GPUs, ASICs, and SoCs.

Target Audience

The primary target audience includes embedded systems developers, chip makers, and companies in the aerospace, automotive, robotics, IoT, and edge computing industries.

Features

  • Low-footprint chip IPs designed for minimal resource utilization in embedded systems
  • On-the-fly, zero-code ANN reconfiguration for dynamic model adaptation
  • Resizable architecture to meet specific customer needs and application requirements
  • Compatibility with a wide range of hardware platforms, including FPGA, CPU, GPU, ASICs, and SoC/NoC architectures
  • ENKI Development System engineered for seamless integration of the ENKI core IP
  • Support for federated learning architectures
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