Daisytuner provides a self-learning compiler cloud that automatically optimizes code for diverse target processors. This platform uses cloud-based tuning to explore thousands of optimization paths, generating high-performance kernels from standard C/C++, ONNX, or PyTorch source code. Developers achieve maximum performance portability across hardware targets by integrating the compiler into their existing CI/CD workflows.
Funding
Funding not disclosed
Founders
Product
Problem
Identifying performance regressions in software development requires manual effort and often occurs late in the development cycle, leading to costly delays and inefficiencies. Developers lack automated tools to continuously monitor and analyze code performance with each commit.
Solution
Daisytuner is a continuous benchmarking and tuning platform that integrates directly into CI/CD pipelines to automatically detect performance regressions. By combining profiling data with performance models, the platform identifies performance bottlenecks and estimates the potential speedup achievable before hitting hardware limits. Developers can trigger benchmarking jobs from workflow definitions, measure a wide range of metrics from context switches to DRAM bandwidth, and use compiler extensions to automatically instrument source code regions for deeper insights. The platform provides performance reports directly in pull requests, enabling developers to catch performance bugs before they impact production.
Target Audience
Daisytuner targets software development teams, performance engineers, and DevOps professionals who need to continuously monitor, analyze, and optimize code performance within their CI/CD pipelines.
Features
- GitHub App integration for 1-click setup and continuous benchmarking workflows
- Automated performance reports and status checks delivered directly to pull requests
- Support for a wide range of performance metrics, including context switches, DRAM bandwidth, cache misses, and FLOP counters
- Compiler plugins for automatic source code instrumentation and performance analysis
- Roofline model integration to estimate potential speedup based on hardware limitations
- Support for various profilers, including perf, py-spy, and nsys, with flame graph visualizations
- Ability to benchmark code on diverse hardware, including ARM, x86, GPUs, and TPUs, or self-hosted runners
- Integration with LLVM to provide insights into code regions and optimization potential