Funding
Funding not disclosed
Founders
Product
Problem
Designing high-throughput streaming hardware for compute‑intensive workloads typically requires low‑level hardware description languages and manual pipeline optimization, which is time‑consuming and error‑prone. Engineers often lack a clear, predictable mapping from algorithmic code to the resulting hardware architecture, making rapid iteration difficult.
Solution
CompuFlow provides FlowBench, a system‑level hardware generation toolchain that lets developers describe compute‑intensive streaming algorithms in standard C++. FlowBench translates the code into a static dataflow graph, performs scheduling and optimization, and generates hardware while preserving the designer’s architectural intent. The tool supports custom fixed‑point and floating‑point types and offers bit‑accurate C++ simulation for fast verification. By abstracting low‑level details yet maintaining full control over the pipeline structure, FlowBench enables rapid, predictable creation of deeply pipelined streaming architectures.
Target Audience
Primary users are hardware designers and engineers developing high‑performance streaming accelerators for domains such as signal processing, machine learning, and scientific computing.
Features
- C++‑based front‑end that maps source code to a static dataflow graph for hardware generation
- Automatic scheduling and optimization targeting deeply pipelined streaming architectures
- Transparent relationship between source code and generated hardware, preserving designer control
- Support for custom fixed‑point and floating‑point numeric types
- Bit‑accurate C++ simulation environment for rapid functional verification
- System‑level abstraction that raises productivity without sacrificing implementation quality