Chipletz develops advanced packaging solutions using its Smart Substrate™ technology to integrate diverse chiplets seamlessly. This approach scales system performance beyond traditional transistor scaling limits for demanding AI and HPC applications. The substrate functions as the complete system, offering superior die-to-die bandwidth and improved power integrity.
Funding
$32.3M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
SFounders
Product
Problem
Traditional semiconductor scaling faces limitations in enhancing die-to-die bandwidth and external I/O speeds, hindering performance gains in AI and high-performance computing applications. Interposer-based integration methods add complexity and can compromise power integrity.
Solution
Chipletz offers Smart Substrate™, a technology that integrates multiple chiplets without an interposer. This approach enhances die-to-die bandwidth and external I/O speeds, improving power integrity and overall system performance. By eliminating the interposer, Smart Substrate™ allows for denser and faster on-package interconnects, enabling superior interconnectivity between chiplets. The technology facilitates faster high-speed I/O to external compute modules and peripherals, addressing the limitations of traditional scaling methods. Smart Substrate™ reimagines AI and HPC systems from the ground up, scaling performance beyond Moore's Law.
Target Audience
The primary target audience includes companies developing AI and high-performance computing systems seeking to overcome the limitations of traditional semiconductor scaling.
Features
- Interposer-less integration of multiple chiplets
- Enhanced die-to-die bandwidth through denser on-package interconnects
- Faster high-speed I/O to external compute modules and peripherals
- Improved power integrity and total system power
- Seamless integration of diverse chiplets, including compute, I/O, security, and HBM