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ChipFoundry

ChipFoundry offers an AI‑driven web platform that automates the end‑to‑end flow from RTL to GDSII, letting users select open‑source reference designs or a configurable RISC‑V SoC and submit them for fixed‑price tape‑out on scheduled MPW shuttles. The service provides low‑cost silicon prototyping and small‑batch production with optional packaging, supported by open‑source PDKs, development boards, and community resources for educators, makers, and startups.

Founded 202572K+ followers
Updated 3 months ago

Funding

Funding not disclosed

Funding rounds are not available yet.

Founders

Founder details are not available yet.

Product

Problem

Designing and fabricating custom silicon chips typically requires expensive EDA tools, specialized expertise, and access to multi-project wafer (MPW) shuttles, creating high barriers for innovators, educators, and small product teams.

Solution

ChipFoundry provides an AI‑powered, end‑to‑end platform that streamlines the creation of application‑specific integrated circuits from concept to silicon. Users can select open‑source reference designs and leverage automated RTL‑to‑GDSII flows, while the chipIgnite service offers a pre‑built RISC‑V SoC with configurable I/Os and optional packaging. The platform grants access to scheduled MPW shuttles at a fixed tape‑out price, enabling rapid prototyping and low‑volume production without deep design knowledge. Community resources, educational tools, and open‑source PDKs support collaborative development and learning. All services are delivered through a web interface that handles reservation, quoting, and design submission, simplifying the path from idea to fabricated chip.

Target Audience

Primary customers are university programs, students, and makers seeking hands‑on chip design experience, as well as startups and product developers needing affordable, low‑volume silicon prototypes.

Features

  • AI‑driven design assistance that automates layout generation using open‑source EDA tools
  • Pre‑built RISC‑V SoC platform with up to 15 mm² die area and 38 configurable digital/analog I/Os
  • Fixed‑price tape‑out ($14,950) including optional QFN packaging or bare die delivery
  • Access to scheduled MPW shuttles (e.g., CI2605) for rapid, low‑cost prototyping and small‑batch production
  • Integrated development board and software support for immediate bring‑up and testing
  • Open‑source process design kit (PDK) and reference IP library with no legal agreements required
  • Collaborative community portal with resources, tutorials, and knowledge‑base articles
This profile is AI-generated and may contain inaccuracies.