Celera

Celera designs custom LLVM-based compilers and toolchains that enable efficient machine learning execution on specialized processors, from x86 multicores to neuromorphic architectures. The company ports standard deep learning frameworks like TensorFlow/XLA, Glow, and ONNX to proprietary hardware, applying optimization techniques such as convolution slicing to maximize performance on dedicated MAC units and complex DMA engines.

Traction –/10

Santa Clara, United States · HQ

3K+ followers

Developer Tools
Semiconductor
Artificial Intelligence
Software Only

Updated 11 days ago

Funding

Funding rounds are not available yet.

Founders

Founder details are not available yet.

Product

Problem

Specialized processors, particularly neuromorphic and other non-standard architectures, require tailored software toolchains to be usable. Off-the-shelf compilers often fail to exploit unique features like dedicated MAC units, sophisticated instruction set architectures (ISAs), and complex DMA engines, leaving hardware performance untapped and forcing developers to write low-level, architecture-specific code.

Solution

Celera offers custom compiler and toolchain development services that enable efficient machine learning execution on diverse hardware. The company designs LLVM-based compilers for various architectures, from common x86 multicores to specialized neuromorphic processors, and integrates deep learning frameworks like TensorFlow and Glow. Their work includes implementing quantization and convolution slicing optimization algorithms to improve model performance. By porting standard toolchains to proprietary processors, Celera creates a smooth path from high-level models like ONNX to optimized machine code, allowing hardware teams to focus on their core chip design.

Target Audience

Celera's primary customers are semiconductor companies and hardware developers building custom processor architectures, particularly neuromorphic and AI-accelerated chips, who need optimized software toolchains to enable machine learning workloads on their hardware.

Features

LLVM-based compiler design for diverse architectures, including RISC-V extensions with dedicated ML instructions
Porting of standard deep learning toolchains (TensorFlow/XLA, Glow, ONNX) to custom processors
Convolution slicing optimization algorithms that improve model performance on specialized hardware
Expertise in maximizing usage of dedicated MAC units, sophisticated ISAs, and complex DMA engines
Full toolchain integration from high-level model formats down to code generation