Casimir develops micro‑scale energy‑harvesting chips that draw power from quantum Casimir fields, eliminating the need for batteries, cords, or conventional charging. 5 V output at 25 µA, enabling devices to operate indefinitely in any lighting condition.
Funding
Funding not disclosed
Founders
Product
Problem
Many low‑power electronic devices rely on batteries, wired power, or periodic charging, which limits deployment in remote, constrained, or long‑duration applications. Battery replacement and charging infrastructure add cost, maintenance, and environmental impact, especially for distributed IoT sensors and wearable electronics.
Solution
Casimir produces micro‑scale energy‑harvesting chips that convert energy from quantum Casimir fields into a steady electrical output. The flagship Microsparc chip, measuring 5 mm × 5 mm, delivers a continuous 1.5 V at 25 µA without any external light source, enabling devices to operate indefinitely. The technology uses proprietary Casimir cavities fabricated in clean‑room nanofabrication facilities, allowing power generation in both illuminated and dark environments. As performance targets are met, multiple chips can be stacked or assembled in series and parallel to increase voltage and current while maintaining the same footprint, providing a path to higher power levels. The harvested energy is supplied directly to the load, eliminating the need for batteries, cords, or conventional charging cycles.
Target Audience
Primary customers are manufacturers of low‑power IoT sensors, medical implants, wearables, and aerospace electronics that require reliable, maintenance‑free power over long periods.
Features
- 5 mm × 5 mm Microsparc chip that provides a continuous 1.5 V, 25 µA output
- Energy harvested from quantum Casimir fields, functioning day and night without external illumination
- Proprietary Casimir cavity design with midplane pillars validated by Kelvin Probe Force Microscopy
- Clean‑room nanofabrication and microprobe testing ensure consistent performance across production runs
- Scalable architecture: chips can be stacked or connected in series/parallel to achieve up to 100× higher power density within the same footprint
- No reliance on batteries, cords, or external charging infrastructure, reducing maintenance and waste