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Athos

Athos develops safety‑first silicon for mission‑critical autonomous systems in robotics, automotive, and aerospace.

Santa Clara, United StatesFounded 202563K+ followers
Updated 1 month ago

Funding

Funding not disclosed

Funding rounds are not available yet.

Founders

Product

Problem

Edge autonomous systems in robotics, automotive, and aerospace require compute that is not only high‑performance but also predictable, fault‑contained, and certifiable for safety‑critical operation. Existing processors are designed for data‑center or consumer use and lack built‑in mechanisms to guarantee deterministic behavior, leading to complex software workarounds, costly redundancy, and long certification cycles.

Solution

Athos delivers a safety‑first silicon platform built around its Chiptile™ compute chiplet, which integrates a CPU, GPU, NPU, and I/O into a single ARM‑based system‑on‑chip. The chiplet runs standard operating systems (Linux, Android, QNX) so developers can use their existing autonomy stacks while benefiting from hardware‑level scheduling and voting that enforce deterministic execution and fault containment. By replicating verified chiplets in a Multiple Systems on Chip (mSoC™) architecture, Athos provides scalable performance without increasing software complexity or validation effort. The approach reduces power consumption, shortens certification timelines, and enables fail‑operational autonomy that remains safe even when individual tiles encounter faults.

Target Audience

Primary customers are OEMs and system integrators developing safety‑critical autonomous solutions for robotics, automotive (including advanced driver‑assistance and autonomous vehicles), and aerospace applications.

Features

  • Integrated CPU, GPU, NPU, and I/O on a single ARM‑based chiplet, bootable with Linux, Android, or QNX
  • Hardware scheduling and voting logic that guarantees deterministic task execution and isolates faults before they propagate
  • mSoC™ architecture that scales by replicating the same verified chiplet, preserving safety evidence across variants
  • Single‑tape‑out Polaris chip family offering multiple performance variants while maintaining a common safety foundation
  • Reduced software stack complexity and lower power envelope compared to board‑level redundancy solutions
  • Designed for mission‑critical certification, leveraging a de‑risked methodology originated from Mercedes‑Benz autonomous‑driving R&D
This profile is AI-generated and may contain inaccuracies.