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ADC

ADC builds biomimetic perception and cognition systems inspired by the mammalian extended visual pathway, delivering unsupervised front‑end “retina” learning and self‑evolving back‑end “visual cortex” models that adapt in real time with low compute. Their flagship product is a hybrid high‑speed correlator/neural‑network EViP chip—5 × 5 mm, a few grams, and capable of tera‑ops per second at under 2 pJ per operation—bringing server‑class visual processing to handheld and small‑business devices.

Updated 1 month ago

Funding

Funding not disclosed

Funding rounds are not available yet.

Founders

Founder details are not available yet.

Product

Problem

Current machine vision systems rely on high‑power server hardware or inefficient on‑device processing, limiting real‑time perception for handheld devices and small‑scale applications. This constraint hampers adaptive, low‑latency visual cognition needed for autonomous operation in edge environments.

Solution

ADC addresses this gap with a biomimetic perception and cognition platform modeled on the mammalian extended visual pathway. The architecture combines unsupervised “retina” learning for continuous, autonomous adaptation with a self‑evolving “visual cortex” that performs supervised learning without costly retraining. Central to the offering is the EViP chip—a 5 × 5 mm hybrid correlator/neural‑network processor that delivers tera‑operations per second at under 2 pJ per operation, enabling server‑class performance on a lightweight, low‑power device. Complementary software includes a neural compiler and a dedicated machine‑learning language, allowing developers to map algorithms efficiently onto the hardware. Together, these components provide real‑time, adaptive machine vision for edge devices and small‑business workloads.

Target Audience

Primary customers are hardware manufacturers, robotics firms, and edge‑computing solution providers that require high‑performance, low‑power vision processing for devices such as drones, wearables, and industrial inspection tools.

Features

  • Hybrid high‑speed correlator/neural‑network EViP chip (5 × 5 mm, few grams) delivering tera‑ops/sec at < 2 pJ per operation
  • Unsupervised “retina” front‑end learning for continuous, on‑the‑fly adaptation to changing visual inputs
  • Self‑evolving “visual cortex” back‑end supervised learning that converges quickly without full retraining
  • Neural compiler and specialized machine‑learning language for efficient mapping of models onto the chip
  • Low‑power, embedded form factor suitable for handhelds, drones, and small‑business edge devices
  • On‑device processing eliminates dependence on remote servers, reducing latency and bandwidth usage
This profile is AI-generated and may contain inaccuracies.