AccelerComm develops customizable semiconductor IP cores for physical layer solutions in terrestrial and satellite radio access networks, focusing on channel coding and signal processing. Their technology enhances 5G network performance by minimizing latency and power consumption while maximizing throughput and capacity.
Funding
$38.4M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
HFounders
Product
Problem
Modern terrestrial and satellite radio access networks require high-performance physical layer solutions to maximize throughput and capacity while minimizing latency and power consumption. Existing solutions often struggle to meet these demands, particularly in challenging environments or with evolving 5G standards.
Solution
AccelerComm provides customizable semiconductor IP cores for physical layer solutions, specializing in channel coding and signal processing to enhance 5G network performance. Their technology focuses on delivering ultra-high performance and error resilience, maximizing throughput and capacity while minimizing latency and power consumption. AccelerComm's IP solutions are designed to be platform-independent and scalable, catering to a wide range of applications from private networks to large-scale cloud RAN deployments. The company's offerings include software-defined O-RAN High PHY and a library of scalable accelerator IP cores for ASIC, FPGA, and SoC implementations.
Target Audience
The primary target audience includes manufacturers of terrestrial and satellite radio access networks, particularly those focused on 5G infrastructure, as well as companies developing private networks and specialized O-RAN network applications.
Features
- Customizable Intellectual Property (IP) cores for 5G physical layer solutions
- Channel coding and signal processing algorithms optimized for high performance and low power consumption
- Scalable modular IP solutions suitable for private networks to large-scale cloud RAN
- Software-defined O-RAN High PHY for arm processor architecture
- Accelerator IP cores for ASIC, FPGA, and SoC implementations
- Patented algorithms to minimize latency and maximize network capacity
- Field-proven implementations on space-hardened platforms for non-terrestrial networks
- Configurable area/performance/power options to match satellite SWaP requirements