Absolics supplies large glass substrates that embed active and passive components, delivering higher signaling speed, lower power consumption, and reduced package thickness for advanced semiconductor packages. The technology improves signal and power integrity by up to 40‑50% and supports high‑frequency, low‑power I/O for chiplet and accelerator designs, targeting HPC, data‑center, and AI hardware manufacturers.
Funding
$100M raised to dateRaised to date based on public sources. This may differ from the amount the company actually raised and is based only on what is publicly available on the internet.
Founders
Product
Problem
High‑performance computing (HPC) and data‑center applications require semiconductor packages that deliver higher signaling speed, lower power consumption, and smaller form factors, but traditional silicon or polymer substrates limit performance and increase power draw. The industry also faces constraints in scaling fine patterns and large‑area, low‑power substrates for emerging chiplet and accelerator designs.
Solution
Absolics provides large glass substrates that integrate active and passive elements directly into the material, enabling superior signaling characteristics and reduced power consumption for advanced semiconductor packages. The glass platform offers higher frequency operation, lower loss, and the ability to embed next‑generation I/O, which improves overall package performance. By consolidating multiple functions into a single substrate, the solution reduces package thickness and simplifies the stack, supporting higher density chiplet integration and faster data processing. These benefits target HPC‑related packaging companies, data‑center hardware manufacturers, and AI accelerator developers seeking to meet growing performance demands.
Target Audience
Primary customers are advanced packaging firms and hardware manufacturers serving high‑performance computing, data center, and AI accelerator markets that require high‑speed, low‑power semiconductor packages.
Features
- Large glass substrate with built‑in active and passive components for enhanced signal integrity
- Up to 40% improvement in signal integrity (SI) and 50% improvement in power integrity (PI) versus conventional substrates
- Low‑power, high‑frequency operation supporting next‑generation I/O standards
- Reduced package thickness and simplified structure through substrate integration
- Compatibility with chiplet and multi‑accelerator designs for high‑speed communications
- Proven technology backed by patented designs (e.g., US Patent 10,903,157)