10xEngineers supplies ready‑to‑integrate RISC‑V uncore IPs, high‑performance image signal processing IPs, and AI compiler tools, along with end‑to‑end design services such as verification and hardware acceleration. Their cloud‑based testing platform and offshore engineering teams help fabless SoC designers and ASIC/FPGA vendors accelerate development and reduce time‑to‑market.
Funding
Funding not disclosed
Founders
Product
Problem
Fabless semiconductor companies often struggle to find specialized engineering talent and comprehensive IP solutions for RISC‑V cores, image signal processing, and AI compiler stacks, leading to prolonged design cycles and delayed market entry.
Solution
10xEngineers provides a portfolio of ready‑to‑integrate RISC‑V uncore IPs, high‑performance image signal processing IPs, and AI compiler tools built on MLIR and LLVM. The company offers end‑to‑end design services—including verification, compiler customization, and hardware acceleration—to accelerate development and reduce time‑to‑market. Its cloud‑based RISC‑V testing platform (Cloud V) enables rapid CI/CD for silicon validation, while open‑source initiatives like Infinite ISP supply complete ISP design flows from algorithm to RTL. By supplying both IP and expert engineering resources, 10xEngineers helps customers meet stringent quality standards and launch products faster.
Target Audience
Primary customers are fabless SoC designers, ASIC/FPGA vendors, and hardware startups that need RISC‑V core/IP, ISP solutions, or AI compiler capabilities to accelerate product development.
Features
- RISC‑V uncore IPs (IOPMP, Debug & N‑Trace) with full verification and integration support
- Image Signal Processing IPs (Infinite ISP, CUDA ISP, Video Scaler, HDR) covering algorithm research, RTL, FPGA/ASIC implementation, and tuning tools
- AI compiler stack (Baltoro, QuantX) built on MLIR/LLVM for RISC‑V Vector and custom accelerators, including model compression and custom intrinsics
- Cloud V on‑demand CI environment for Linux, QEMU, and script‑based testing of RISC‑V designs
- Full‑stack services: migration from ARM to RISC‑V, formal verification, and compiler/toolchain development
- Open‑source ISP suite with algorithm models, golden reference, and tuning ecosystem
- Dedicated offshore engineering teams delivering design, verification, and compiler expertise without HR overhead