SiLogy

About SiLogy

SiLogy develops Viv, an AI verification engineer that automates the debugging of test failures in integrated circuits by analyzing log files and code, significantly reducing the time to identify bugs. By enabling chip developers to root-cause issues up to ten times faster, SiLogy enhances productivity and accelerates the design verification process.

<problem> Debugging test failures in integrated circuits is a time-consuming process, often requiring engineers to manually analyze extensive log files and code. This manual debugging slows down the design verification process and hinders overall productivity. </problem> <solution> SiLogy offers Viv, an AI-powered verification engineer that automates the debugging of test failures in integrated circuits. Viv analyzes log files and code to identify the root cause of bugs, significantly reducing the time required for debugging. By automating repetitive tasks and providing clues about the causes of test failures, Viv enables chip developers to accelerate the design verification process and improve productivity. The platform can be hosted on-premise, ensuring data security. </solution> <features> - AI-driven analysis of log files, code, and (soon) waveform files to identify the root cause of test failures. - Support for multiple simulators, including Synopsys VCS, Siemens QuestaSim, Verilator, and Vivado Simulator. - On-premise hosting option to ensure data security and compliance. - Test runner that supports most commercial simulators. - Suggestions for potential bug locations, citing specific code and waveforms. - SOC2 certification in progress. </features> <target_audience> The primary target audience includes chip developers and verification engineers involved in the design and testing of integrated circuits. </target_audience>

What does SiLogy do?

SiLogy develops Viv, an AI verification engineer that automates the debugging of test failures in integrated circuits by analyzing log files and code, significantly reducing the time to identify bugs. By enabling chip developers to root-cause issues up to ten times faster, SiLogy enhances productivity and accelerates the design verification process.

Where is SiLogy located?

SiLogy is based in East New York, United States.

When was SiLogy founded?

SiLogy was founded in 2023.

How much funding has SiLogy raised?

SiLogy has raised 500000.

Who founded SiLogy?

SiLogy was founded by Kay Li.

  • Kay Li - CEO
Location
East New York, United States
Founded
2023
Funding
500000
Employees
5 employees
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SiLogy

Score: 80/100
AI-Generated Company Overview (experimental) – could contain errors

Executive Summary

SiLogy develops Viv, an AI verification engineer that automates the debugging of test failures in integrated circuits by analyzing log files and code, significantly reducing the time to identify bugs. By enabling chip developers to root-cause issues up to ten times faster, SiLogy enhances productivity and accelerates the design verification process.

silogy.io700+
Founded 2023East New York, United States

Funding

$

Estimated Funding

$500K+

Team (5+)

Paul Kim

CTO

Kay Li

CEO

Company Description

Problem

Debugging test failures in integrated circuits is a time-consuming process, often requiring engineers to manually analyze extensive log files and code. This manual debugging slows down the design verification process and hinders overall productivity.

Solution

SiLogy offers Viv, an AI-powered verification engineer that automates the debugging of test failures in integrated circuits. Viv analyzes log files and code to identify the root cause of bugs, significantly reducing the time required for debugging. By automating repetitive tasks and providing clues about the causes of test failures, Viv enables chip developers to accelerate the design verification process and improve productivity. The platform can be hosted on-premise, ensuring data security.

Features

AI-driven analysis of log files, code, and (soon) waveform files to identify the root cause of test failures.

Support for multiple simulators, including Synopsys VCS, Siemens QuestaSim, Verilator, and Vivado Simulator.

On-premise hosting option to ensure data security and compliance.

Test runner that supports most commercial simulators.

Suggestions for potential bug locations, citing specific code and waveforms.

SOC2 certification in progress.

Target Audience

The primary target audience includes chip developers and verification engineers involved in the design and testing of integrated circuits.